1. Field of the Invention
This invention relates to an electrically rewritable and non-volatile semiconductor memory device (EEPROM) and an electric device using the same.
2. Description of the Related Art
EEPROM flash memories are roughly classified into two types, i.e., NAND-type and NOR-type. A NAND-type flash memory uses a NAND string (i.e., NAND cell unit) with plural cells serially connected thereby sharing sources and drains with the neighboring cells. Due to this fact, the NAND-type flash memory has a higher cell density than a NOR-type flash memory. In addition, since NAND-type flash memory is possible to be written into plural cells at a time by FN tunneling, power consumption thereof is small. In consideration of these characteristics, the NAND-type flash memory is generally applied to a file memory with a large scale capacitance. On the other hand, NOR-type flash memory is characterized in that it is high-speed accessible, while the power consumption is large because hot electron injection is used for data writing. Therefore, the NOR-type flash memory is mainly applied to mobile devices.
However, recent mobile devices are going to process image data and the like with large data quantities. Accordingly, it is required of a flash memory to have high-speed accessibility and a large capacitance like a file memory. As described above, a conventional NAND-type flash memory, having low cell current due to its NAND string structure, is not suitable for high-speed random accessing. To apply a NAND-type flash memory to a high-speed system with a buffer memory such as a DRAM or the like, such a method is used as, for example, to read out one page data to a page buffer, then serially transfer and output the read out data, thereby improving a data transmission rate.
Even if the above-described method is used, the performance improvement of the conventional NAND flash memory is limited. The reason is it is impossible to use a reference level for high-speed sensing because the cell current of the NAND-type flash memory is about 1/100 to 1/10 of that of the NOR-type flash memory. The sense amplifier used in the conventional NAND flash memory is configured to sense cell data by sensing whether the data charge in the latch is discharged or not in response to the on/off state of a selected cell. Therefore, it takes about a few or several micro seconds for data reading. In contrast to this, in the NOR-type flash memory, the cell dada read may be done in 10 to 100 [nsec].
One approach for increasing the cell current of the NAND-type flash memory is to make the cell size (i.e., channel width) large. However, this approach will diminish a property of the NAND-type flash memory as the unit cell area is small.
In a DRAM, it takes about 5 [nsec] for giving voltage difference of about 50 [mV] to a pair of bit lines with a capacitance of about 100 [fF] to sense it. The current amount in this case is about 1 [μA]. On the other hand, the cell current of the NAND flash memory is about 1 [μA]. Suppose that the cell array is formed with such a scale as the bit line capacitance is about 1 [pF], the cell data sensing may be done in about 50 [nsec]. In order to achieve the above-described data sensing time, it is necessary to use a bit line pair scheme, by which a static reference level is obtained, like the DRAM. However, it is required of a NAND-type flash memory to determine the cell data by use of the on-state and off-state. It is not practical to statically make a reference current with about a half of the on-cell current for each bit line pair.
It has already been provided to use a multi-value data storage scheme in order to make a flash memory able to store a large data quantity. It has also been provided a method for shortening read time by reducing the number of data read steps in a case that multi-value storage scheme is used (see, e.g., Published Unexamined Japanese Patent Application No. 2001-93288).
As described above, NAND-type and NOR-type flash memories are classified according to applications as follows: the former is used for applications in which large data quantity storing is required; and the latter for applications in which high-speed performance is required. In consideration of the above-described situation, recently, it is required to achieve a flash memory technique that is able to make the best use of the characteristics of both a NAND-type flash memory and a NOR-type flash memory.